Troubleshooting how and why systems and circuits fail is important and is rapidly growing in industry significance. Debug and diagnosis may be needed for yield improvement, process monitoring, correcting the design function, failure mode learning for R&D, or just getting a working first prototype. This detective work is however very tricky. Sources of difficulty include circuit and system complexity, packaging, limited physical access, shortened product creation cycle and time-to-market. New and efficient solutions for debug and diagnosis have a much needed and highly visible impact on productivity.

SDD 2012 will be held in Anaheim, California, USA, immediately following ITC 2012. It is the eighth of a series of highly successful technical workshops that consider issues related to debug & diagnosis of semiconductor circuits and systems - from prototype bring-up to volume production.

This year's edition of the SDD workshop will follow the tradition from the previous years with an exciting technical program. More details about registration for the workshop are available here.

A couple of invited talks from Eric Rentschler (Fellow at AMD) and Shawn Blanton (Professor of ECE at CMU) will be complemented by talks and posters on topics ranging from case studies and methods for silicon debugging of complex SOC devices to volume diagnostics and discovery of systematic yield detractors. A panel on coverage metrics for post-silicon validation will bring together a group of technical experts to discuss how to measure and improve the post-silicon validation process.

More details about the SDD 2012 program are available by browsing the above links or by ckecking the enclosed PDF files for the invited talks and the full technical program.

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